nju8716a/b -1- ver.2005-03-09 switching driver with regulator for class-d headphone amplifier general description the nju8716a/b is switching driver with regulator for class-d headphone amplifier. it incorporates optimum regulator for the driver of headphone amplifier. the nju8716a/b converts 1bit audio signals such as pwm/pdm to analog audio signals with simple external lc low-pass filter. the nju8716a/b provides completed digital system and high power-efficiency with class-d operation. therefore it is suitable for portable audio applications. features 2-channel 1bit audio signal input headphone output built-in regulator for driver logic operating voltage 1.7~3.0v(v dd ) driver operating voltage 1.6~3.5v(v ddo1 , v ddo2 ) regulator operating voltage 4.0~5.75v(v reg1 ) 1.9~4.0v(v reg2 ) c-mos technology package outline ssop16 version lineup version data latch nju8716a the rising edge of mck NJU8716B the falling edge of mck block diagram package outline nju8716av, NJU8716Bv pin configuration v rego c fb v reg1 v cont v ss v reg2 v ddo2 out 2 v sso v sso 1 2 3 4 5 16 15 14 13 12 6 7 11 10 mc k v dd out 1 v ddo1 8 9 d in 2 d in 1 regulator v dd v ss d in1 d in2 out 1 out 2 v reg2 c fb v rego v cont v reg1 mc k pre driver pre driver level shifter v ddo1 v ddo2 v sso v sso hp amp hp amp low voltage detector v rego low voltage detector v dd level shifter level shifter level shifter preliminary
nju8716a/b - 2 - ver.2005-03-09 terminal description no. symbol i/o function 1 v rego o regulator output terminal 2 c fb i regulator output voltage sense terminal 3 16 v reg1 v reg2 - regulator power supply 4 v cont i regulator output voltage control terminal 5 v ss - power gnd:v ss =0v 6 mck i master clock input terminal audio signals are latched on the edge of mck. a version: latched on the rising edge b version: latched on the falling edge 7 v dd - power supply: v dd =2.0v 9 8 d in1 d in2 i audio signal input terminal 1,2 10 15 v ddo1 v ddo2 - driver power supply 1,2 11 14 out 1 out 2 o output terminal 1,2 12 13 v sso - driver gnd: v sso =0v input terminal structure mck, d in1 , d in2 v dd v ss input terminal internal circuit
nju3555 nju3555 nju8716a/b -3- ver.2005-03-09 functional description (1) power supply v dd : power supply for input circuit and control logic. keep the input logic level less than v dd . if v dd reaches less than sleep detection voltage, power consumption can be saved with halts of built-in regulator. v reg1 : power supply for built-in regulator. even after power-on, v reg1 line is shut off with transistor switch until v dd has been started up. v reg2 : power supply for built-in regulator. apply the required voltage with additional dropout voltage of regulator. by connecting v rego (regulator output) to v ddo1 , v ddo2 (driver power supply), the power is provided at the drivers. and furthermore, the regulator output should be supplied to v ddo1 and v ddo2 by connecting de-coupling capacitor to get highly smoothed power supply. (2) regulator output voltage control terminal (v cont ) v cont is the control terminal for regulator output voltage. v rego terminal generates double the voltage of supplied voltage to v cont . (shorted between v rego -c fb ) (3) master clock (mck) master clock (mck) synchronizes the audio signal inputs (din 1 and din 2 ). the setup time and the hold time should be kept in the ac characteristics because din 1 and din 2 are fetched with the rising edge of mck in a version, and the falling edge of mck in b version. during the standby condition, mck requires ?l? level to avoid unnecessary power consumption. in addition, mck requires jitter-free or jitter as small as possible because the jitter could lead to poor s/n ratio. (4) signal output (out 1 / out 2 ) out 1 and out 2 terminals keep the hi-z condition if output voltage of v rego is lower than detection voltage. output signals are appeared as pwm signals through the use of v ddo1 and v ddo2 in the out 1 and out 2 terminals if the output voltage is over than detection voltage. output signals will be converted to analog signals via 2nd-order or higher lc filter. power on/down sequence the pop-noise can be effectively suppressed with the following sequence when power on and off. (1) power on sequence 1) start up v dd , v reg1 and v reg2 . 2) input the master clock (mck) and audio signals (d in1 , d in2 ) after the start-up of v dd , v reg1 and v reg2 . at this time, audio signals must be input as ?sound-less data?. 3) increase v cont . 4) input the audio data after v cont reaches a steady state. (2) power down sequence the sequence must be executed in inverse order of the power on sequence. high impedance v dd , v reg1 , v reg2 d in1 , d in2 audio data v cont mc k sound-less data sound-less data out 1 , out 2 audio signal output high impedance
nju8716a/b - 4 - ver.2005-03-09 absolute maxmum ratings (ta=25 c) parameter symbol rating unit v dd -0.3 ~ +4.0 v v ddo1 , 2 -0.3 ~ +4.0 v v reg1 v reg2 ~ +6.0 v supply voltage v reg2 -0.3 ~ +5.5 v input voltage vin -0.3 ~ v dd +0.3 v operating temperature ta -20 ~ +85 c storage temperature tstg -40 ~ +125 c power dissipation p d 300 (ssop16) mw note.1) the relations of ?v ddo1 ,v ddo2 nju3555 nju3555 nju8716a/b -5- ver.2005-03-09 (2) regulator characterritics (ta=25 c, v dd =2.0v, v ddo1 =v ddo2 =1.8v, v reg2 =2.15v, v reg1 =5.0v, v ss =v sso =0.0v, load impedance=16 ? , f s =44.1khz, unless otherwise noted) parameter symbol conditions min typ max unit v reg1 4.0 - 5.75 v power supply v reg2 1.9 - 4.0 v i reg2 - 0.4 0.8 power supply current at operating i reg1 no-load - 0.1 0.2 ma off-leakage current i reg1off v dd =0.5v or lower d in1 =l d in2 =l mck=l - - 1 a input voltage v cont 0 - v reg2 v input leakage current i lk v cont - - 1 a v rego1 v reg2 =2.5v, v cont =1.0v 1.9 2.0 2.1 v output voltage v rego2 v reg2 =2.5v, v cont =0v - - 0.1 v output current i out 70 - - ma output sink current i sink 60 - - ma v reg2 -v rego dropout voltage ? v io - - 0.2 v ripple rejection rr vr=0.1vrms,iout=70ma fr=1khz 36 44 - db load regulation voltage v lr v out1 =v out2 =-6dbm f out1 =f out2 =1khz - 690 1228 vrms v det1 1.1 1.25 1.4 v v rego low voltage detection v det2 ta=-20 ~+70 c 1.0 1.25 1.5 v sleep detection voltage v det3 0.5 0.75 1.0 v note.5) v lr (load regulation voltage) is effective with our measurement pcb only. the following figure shows a representative example of v rego versus v cont at v reg2 =2.5v. 0.0 0.5 1.0 1.5 2.0 2.5 3.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 v cont (v) v rego ( v ) note.6) output voltage of v rego is maximum v reg2 . in v ddo1 and v ddo2 terminals supplied from v rego, please set v reg2 and v cont not to exceed thei r operating voltage.
nju8716a/b - 6 - ver.2005-03-09 (3) ac characteristics (ta=25 c, v dd =2.0v, v ddo1 =v ddo2 =1.8v, v reg2 =2.15v, v reg1 =5.0v, v ss =v sso =0.0v, load impedance=16 ? , f s =44.1khz, unless otherwise noted) parameter symbol condition min typ max unit mck frequency f mcki 8 - 25 mhz mck pulse width (h) t mckh 12 - - ns mck pulse width (l) t mckl 12 - - ns d in1 , d in2 setup time t ds 20 - - ns d in1 , d in2 hold time t dh 20 - - ns t mckh mc k t mckl t ds t dh d in1 , d in2 t mckl mc k t mckh t mcki (a version) (b version)
nju3555 nju3555 nju8716a/b -7- ver.2005-03-09 application circuit note.7) de-coupling capacitors must be connected between each power supply pin and gnd. the capacitor value should be adjusted on the application circuit and the temperature. it may malfunction if capacity value is small. note.8) a large-capacitance for the de-coupling capacitors for headphone speaker is recommended to improve a low-frequency characteristics. in addition, a low-esr(equivalent series resistance) capacitor is recommened for high power efficiency. note.9) the above circuit shows only application example and does not guarantee the any electrical characteristics. therefore, please test the circuit carafully to fit your application. 1f nju8716a/b d in1 out 1 out 2 audio signal master clock mck d in2 headphone 16 ? 0.47f 100h 220f 1k ? 0.47f 100h 220f 1k ? 9 8 6 11 14 v ddo1 1f v sso 10 12 v ddo2 v sso 15 13 7 logic powe r v dd v ss 5 0.1f 10f v co nt 220f 1f c fb v rego 16 v reg2 3 2.2 f 4 10f v reg1 regulator power 2 regulator power 1 1 2 v rego control voltage [caution] the specifications on this databook are only given for information , without any guarantee as regards either mistakes or omissions. the application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights.
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